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Design And Reuse - Industry Expert Blogs
  • Apple and China to kill Intellectual Property? (SemiWiki - Eric Esteve)
    The recent (since 2016) news about Apple, China, FTC and other organizations positioning in respect with IP are concerning, as it seems indicating that Intellectual Property in general (Design IP and Technology IP) is at risk. Let’s consider several facts through different cases, involving ARM, Qualcomm, Imagination Technologies vs Apple, the Chinese government or various organization in Europe and the US. ARM vs China ARM is by far the #1 Design IP vendor, with $1, 660 million revenues in 2017. China is becoming to be an important semiconductor market, where chip design activity is fast growing with the Chinese government support. SoC design is characterized by CPU (or DSP, GPU) integration, ARM’s CPU market share is 86%. This makes ARM CPU almost unavoidable, especially for wireless application processor design. In May 2017, ARM – Softbank has created a joint-venture with “Chinese investors” (piloted by the Chinese government) at 49% (ARM) 51% (China). ARM had probably no other choice if the company wanted to continue to license IP in China, so they closed the deal.
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  • MIPI, VESA Plug in Mobile Video (EETimes Blog - Dale Stolitzka)
    New standards deliver high resolution video while minimizing device cost and complexity and maximizing battery life, according to an engineer who worked on one of them. By 2021, 82% of all consumer Internet traffic will be video, Cisco’s Visual Networking Index predicts, a 73% increase from 2016. About the only market segment growing faster is virtual and augmented reality applications whose traffic will have a compound annual growth of 82% between 2016 and 2021. The numbers highlight the fundamental role that video will play in nearly every type of device from smartphones, tablets and AR/VR headsets to connected cars and the Internet of Things (IoT). To meet that demand, the MIPI Alliance just released new versions of MIPI Display Serial Interface 2 (DSI-2) and MIPI Display Command Set (DCS).
    View the full article HERE

  • Thales e-Security's Countermeasure Validation Certification (Rambus Blog - )
    Side-channel analysis, and specifically Differential Power Analysis (DPA), can be used as an attack, statistically analyzing power consumption measurements from a cryptosystem. DPA attacks exploit biases in the varying power consumption of microprocessors or other hardware while performing operations using secret keys. With DPA, an attacker can obtain secret keys by analyzing power consumption measurements from multiple cryptographic operations performed by a vulnerable device. Historically, solutions that included robust encryption/decryption algorithms with cryptographic keys were considered secure, as brute force attacks have ultimately become infeasible due to the increased key length of the cryptographic algorithm. However, side-channel attacks bypass some of the mathematical properties of a cryptographic system, instead, focusing on its implementation in hardware or software. Specifically, cryptographic systems routinely leak information about the internal state of computations. As a result, attackers can exploit various techniques to extract the key and other secret information from the device.
    View the full article HERE

  • PowerVR Tools and SDK 2018 Release 1 now available (With Imagination Blog - Rosanna Ashworth-Jones, Imagination)
    The PowerVR Developer Technology team is delighted to announce the latest version of our PowerVR Tools and SDK – 2018 Release 1. Following on from our major SDK Framework overhaul in our release late last year, this is yet another significant iteration. For starters, we have made further improvements to our SDK Framework, including new examples and documentation. We have made other enhancements and bug fixes throughout our tools to make your development life easier. You can read all about this further down.
    View the full article HERE

  • Imagination hits the road at AutoSens conference (With Imagination Blog - Bryce Johnstone, Imagination)
    Recently, Imagination returned from the AutoSens show held at the Michigan Science Center in downtown Detroit. Aimed at engineers and other stakeholders in the automotive sensor industry, we first attended last autumn and suitably impressed by the quality of attendees, this time we decided to both attend and exhibit to show off Imagination’s on-going presence in the automotive space. The show consists of one set of morning keynote speech and then two parallel sessions held in the afternoon with presentations and panels. The exhibition area was split into two levels, one outside the conference halls and the other on the mezzanine where we were for the three days. Day one (or afternoon one) was devoted to a set of tutorials, while days two and three were the conference. We had a table-top demonstration area on the Mezzanine showing off an array of giveaways – the Imagination ‘ducks’ are always popular as are the smartphone stands.
    View the full article HERE

  • Synopsys Portfolio of ASIL ready IP for Automotive (To USB or Not to USB: A USB IP Blog - Eric Huang, Synopsys)
    Automotive is a big thing these days. All the stuff needed for cars needs to have a long life, and be super fault tolerant. It needs to last for years. Many of the chips ship for 5-10 years for replacements or in multiple model years. (My guess is this may change as better modules become available. It may be possible to upgrade your cars EV (Embedded Vision) module every year or few years to enable better and better recognition, even if the drive train is the same. The reason this kind of upgrade might be possible (or necessary) is that the CVV used for each design may change over time. The graphs used (or proposed) are being introduced every month or week now. Each week these are provided, and then they can be plugged into a system to see. To me it is very much like a bunch of linear algebra equations that some how improve the precision (hopefully). What this allows automakers to do is to continually improve the accuracy and speed of the embedded vision if your vehicle.
    View the full article HERE

  • Cadence Puts the IP in ...well, IP (Cadence on the Beat Blogs - Meera Collier, Cadence)
    A lot has been written about AI and machinelearningdeeplearning, but a friend asked me, what does that have to do with Cadence, anyway? And what do you mean when you say, IP? I realized that I haven’t explained it yet. So here goes! Tensilica Family of DSP IP Imagine that you have a system like a home security system, and it has a sensor, like a camera. That camera is then connected to a central processing unit to interpret the data sent from the sensor, and then from that unit, action is taken based on how it interprets the data—unlock the door or call the police. Seems pretty simple, right? Well, here’s the thing. If we’re sending raw data to the central processing unit, your system must have two capabilities: the ability to send the data quickly to the central processing unit (that is, bandwidth) and a robust enough computer to not only determine friend from foe (AI) but also decide how it wants to react. Both of those aspects of the system can be incredibly expensive—both in terms of cost, and in terms of processing power (and, therefore, power power). And if your sensor is a radar or lidar unit, the “cost”, especially in terms of bandwidth, is even more!
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  • FD-SOI vs FinFET: Dan Hutcheson Re-Runs His Survey (Breakfast Bytes - Paul McLellan)
    Recently, the SOI Consortium held its annual Silicon Valley Symposium. At one of the first sessions I attended, Dan Hutcheson of VLSI Research updated the work that he presented at the same event a couple of years ago. In 2016 he ran a survey across the industry on attitudes to FD-SOI. As he described it: I talked to a wide range; FinFET bigots, SOI bigots, shades in-between. He ran the same survey again this year to see what had changed. He met with decision makers and influencers representing 51% of the IC market and 59% of the IP market, across a wide swath of product categories. About half of them were the same individuals as in 2016. See the pie chart at the top left of this post for a more detailed breakdown.
    View the full article HERE

  • How to keep Key Provisioning cost-effective and enable advanced security (INSIDE Secure Blog - Ron Keidar, Inside Secure)
    Historical background: DIRECTV to SypherMedia In November of 1999, DIRECTV made it a priority to create an in-house security team that would take ownership of broadcast and content delivery security. SypherMedia International (SMI) was formed by members of the DIRECTV Engineering and Conditional Access Group in August of 2003. Before SMI was created, the now SMI team along with fellow DIRECTV members were responsible for re-engineering the security approach of the Pay TV broadcast. This team eliminated piracy at DIRECTV and it has remained secure for more than 15 years. SMI engineers designed and deployed the first key provisioning solution in 1999 at ST Microelectronics as part of the new DIRECTV security engineering team. This was done so that DIRECTV could own and maintain control of the Set-Top-Box (STB) keys that secure DIRECTV’s network.
    View the full article HERE

  • Why Did EDA Have a Hardware Business Model? (Breakfast Bytes - Paul McLellan)
    Business models are really important. Just ask any internet startup company that has lots of users and is trying to work out how to monetize them. It is a lot easier to get people to use something for free, much harder to get people to pay for something, especially when they don't value it much. Different companies that look somewhat similar often have very different business models.
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  • 20 Questions with Wally Rhines (SemiWiki - Daniel Nenni)
    When I first started blogging in 2009 my sound byte was, "I blog for food" and the first lunch invitation I received was from Mentor Graphics CEO Wally Rhines, we have been friends ever since. Wally has an incredible mind with a memory to match, coupled with his charm and depth of experience I would easily say that Dr. Walden Rhines is the most interesting man in the semiconductor ecosystem, absolutely. In this series of blogs I hope to capture Wally's experience in enough detail to publish it as an autobiography. Hopefully the SemiWiki community will get involved and help with questions, comments, and critiques, for the greater good of the semiconductor ecosystem...
    View the full article HERE

  • PowerVR Series2NX: Raising the bar for embedded AI (With Imagination Blog - Benny Har-Even, Imagination Technologies)
    Back in September Imagination changed the game for embedded AI acceleration with the introduction of the Series2NX neural network accelerator (NNA) and today we are proud to announce two cores in the range: the PowerVR AX2185 aimed at the premium markets, and the AX2145 for the mid-range. (We go into more detail about each below). As we explained in our post at the time, neural networks are becoming increasingly prevalent as a tool for solving problems and powering new types of applications across a wide range of industries. Do check out our blog post if you’d like a simple explanation of what neural networks are and how they work.
    View the full article HERE

  • Milliwatts per Gigahash: Crypto Miner ASICs Look to 22FDX (GLOBALFOUNDRIES Foundry Files Blog - Dave Lammers, Globalfoundries)
    The last couple of blogs I’ve written have looked at using the 22FDX® technology process for Internet of Things and automotive radar applications, markets that call for a combination of performance at low power consumption. Cryptocurrency mining is another market where power consumption is a defining characteristic, one reason that miners are moving gradually away from GPUs to ASICs. One of the interesting things about the semiconductor industry is that every application needs a different mix of performance, power consumption, cost, and other factors. The cryptocurrency mining applications are that way, even down to the major coins — Bitcoin, Litecoin, and Ethereum — and the ways they are mined.
    View the full article HERE

  • Accelerate Debug Productivity of Complex Serial Protocols (VIP Experts Blog - Synopsys)
    Debugging the complex serial protocols is the biggest challenge verification engineers face. It’s one of the most time and effort consuming activity affecting the schedule of every project. Traditional debug methodologies use a combination of loosely connected waveforms, log files, messages, and documentation, which are insufficient for productive debugging. Debugging SoC and block level issues using log files is tedious and time consuming. Design problems that appear in the later phases of the development cycle can be extremely difficult to track down and debug, thus putting project schedules at risk. Is there a way to simplify the debug process and performance? Wouldn’t it be easier if one could look at packets and transactions instead of signals? In this blog, we will discuss some the challenges users face to debug complex protocols; and highlight a GUI-based transaction debug solution that is both easy and fast. . We will take USB as an example, discussing the complex features, debug challenges and corresponding solution.
    View the full article HERE

  • PCI-SIG Developer's Conference: What's New with Gen 5 and When Will it be Adopted? (Cadence IP Blog - Lana Chan, Cadence)
    The release of PCIe 4.0 rev 1.0 in October 2017 was anticlimactic after the announcement of PCIe 5.0 rev 0.3 at last year’s PCI-SIG DevCon. Fast forward, this year’s DevCon has kicked off and the SIG is clearly demonstrating its commitment to the accelerated development of PCIe 5.0. PCIe 5.0 rev 0.7 is published and already out for membership review as of May. The big-ticket item is, of course, support for 32GT/s.
    View the full article HERE

  • Accelerate Debug Productivity of Complex Serial Protocols (VIP Experts Blog - Synopsys)
    Debugging the complex serial protocols is the biggest challenge verification engineers face. It’s one of the most time and effort consuming activity affecting the schedule of every project. Traditional debug methodologies use a combination of loosely connected waveforms, log files, messages, and documentation, which are insufficient for productive debugging. Debugging SoC and block level issues using log files is tedious and time consuming. Design problems that appear in the later phases of the development cycle can be extremely difficult to track down and debug, thus putting project schedules at risk. Is there a way to simplify the debug process and performance? Wouldn’t it be easier if one could look at packets and transactions instead of signals? In this blog, we will discuss some the challenges users face to debug complex protocols; and highlight a GUI-based transaction debug solution that is both easy and fast. . We will take USB as an example, discussing the complex features, debug challenges and corresponding solution. Let’s look at the complexity of the USB 3.0 protocol and its corresponding debugging challenges. The USB 3.0 protocol specifies that the host controls the communication with devices by exchanging the following types of signaling, and packets:
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  • Verification and validation: design impacts of bringing the two together (UltraSoC Blog - Andy Gothard, )
    Verification and validation are often viewed as quite separate parts of the chip development cycle. One being pre-, the other post-silicon – owned by different teams, and with different, dedicated toolsets supporting them. More recently, considerable attention has fallen on ways of integrating the two disciplines more tightly. Portable stimulus, for example, is a powerful concept, aiming to allow chip design teams to formulate their verification / validation intent just once, and then use that single specification at any stage of the development cycle. All of the EDA companies are embracing the idea of a verification/validation model that scales end-to-end across the development process: from design, through simulation, emulation and into silicon and system validation. Synopsys calls this the ‘verification continuum’; but as I’ve said, pretty much everyone acknowledges the need and is working to fix it. Less well recognized is the need to scale the whole process “from top to bottom”: to address systemic complexity. This is about more than the hardware. All silicon runs complex and powerful software (much as we might sometimes wish it to be otherwise!) Today, the process of getting the very best possible performance out of that hardware/software combination is where the rubber hits the road.
    View the full article HERE

  • Arm loses leg (Mannerisms - David Manners)
    Softbank has sold 51% of ARM’s China operation for $775 million to local investors, according to Reuters. ARM gets about a fifth of its $1.4 billion annual revenues from China. Under the deal the 51% share will be owned by a consortium led by the Hou An Innovation Fund which is jointly managed by ARM and Hopu Investments with Hou An the controlling shareholder. Hou An’s backers include China Investment Corporation, Silk Road Fund, Temasek Holdings, Shum Yip Group and Hopu.
    View the full article HERE

  • Single-Chip Narrow-Band IoT (SemiWiki - Bernard Murphy)
    Many factors go into building a competitive solution for the IoT, but few are as important for high-volume applications as low cost – not just chip cost but total system cost. If your customers are going to deploy thousands, tens of thousands or even millions of your devices in cities, factories, logistics applications, power grids or homes, products above ~$5 a piece are going to be a very hard sell. I’m not talking here about high-functionality user equipment with high-end sensor fusion, graphics and so on. I’m talking about the little devices that don’t need to do a lot, just a little data-gathering, compute and communication, and should run on a battery for 10+ years. The trend here is no mobility (eg for parking meters or street lights) or very low mobility, with need to send only a few bytes periodically (how often do you need to be reminded “still working and still no car parked at this meter”?). Battery life is incredibly important; maintenance costs to replace batteries, even annually, could undermine the value of the solution. Compute isn’t going to be a big power factor so low-power communication becomes very important. That’s why the Narrow-Band IoT (NB-IoT) standard was developed – to provide a low-power, low-datarate cellular communication solution.
    View the full article HERE

  • Next generation Cordio Bluetooth IP (arm Blogs - Prithi Ramakrishnan, Arm)
    At Bluetooth World Asia 2018, Arm is introducing its third generation of Bluetooth radio IP, Bluetooth Mesh software and joint product offerings through ecosystem partners. This blog post details our new releases and what you can see at Bluetooth World Asia this year. Bluetooth success continues to grow There is no denying that the continued growth and success of Bluetooth technology has made it more pervasive today than ever before. The world is poised to begin another wave of explosive growth in Bluetooth, however for this to materialize there are a few barriers to overcome. Some barriers are somewhat simple to fix: such as cost and power consumption, feature-complete software. However, others, such as security and cloud connectivity, are complex and multifaceted. With the aim to address the need for low-cost, low-power, product-ready feature-complete IP, today Arm is introducing some new Arm Cordio products and will showcase them for the first time at Bluetooth World Asia this week.
    View the full article HERE